1. Field of the Invention
The present invention relates to a memory control device and more particularly to a memory control device and an information processing apparatus configured to perform address conversion in accordance with an address value for a memory.
2. Description of the Related Art
In image processing, pixel data which is information relating to a luminance and a color of each pixel of an image may be expressed as structural data. For example, pixel data of one pixel is classified into a luminance component indicative of the luminance of a pixel concerned and a color component indicative of the color of the pixel concerned. The color component may be divided into components of respective colors.
In the case that data processing is to be executed on the basis of the structural data mentioned above, it may be necessary to read out data from a memory into a processor to extract element data necessary for execution of the processing from the data so read out and hence there may be a problem in that the load imposed on the processor and the time necessary for execution of the processing would be increased. In addition, since necessary data is extracted after the data has been read out into the processor, data which is not necessary for execution of the processing is also transferred temporarily via a bus together with the necessary data, so that there may be a problem in that the bus access volume would be increased.
Thus, in order to decrease the number of arithmetic operations to be executed in the processing mentioned above, there has been proposed a device in which an arithmetic unit configured to perform a given arithmetic operation on data which has been read out using a multi-address is installed in a bus to select arithmetic means in accordance with an address (see, for example, Japanese Laid-Open Patent Publication No. 08-36520 (FIG. 1)).